Recruitment for Lab Engineer & Project
Associate in IIT Ghandhinagar 2016,
post under the SMDP-C2SD project funded by DeiTY, Government of India, in
Discipline of Electrical Engineering.
Post Name & Qualification:
- Lab
Engineer:
- M.E. /
M. Tech. in Electrical / Electronics / Computer Science Engineering &
related disciplines with a valid GATE score and knowledge in VLSI Design
(Analog or Digital) or Microelectronics or equivalent.
- Working knowledge of VLSI CAD tools
like Cadence / Synopsys / Mentor Graphics is required.
- Experience in
LINUX operating system is desired.
- Salary: Rs. 34,000/- per month consolidated
- · Project Associate:
- B. E. / B. Tech. or M. E. / M. Tech. in Electrical / Electronics /
Computer Science Engineering and related disciplines with a valid GATE
score and knowledge in VLSI Design (Analog or Digital) or
Microelectronics or equivalent.
- Working knowledge of VLSI CAD tools like Cadence / Synopsys / Mentor is
preferred.
- Experience in LINUX operating system is desired.
- Salary: Rs. 20,000/- per month consolidated
Application Submit at Venue Address: Dr. NIhar Ranjan Mohapatra, Department of Electrical Engineering, IIT Gandhinagar, by e-mail (nihar@iitgn.ac.in)
Imp Date:
- Last Date of Submission of Application: 30-05-2016
Useful Link: